Analog in 3D ICs and TSVs

文章：Jean-Jaques（JJ）Delisle

The steady march toward 3D ICs, namely mixed-signal or multi-technology systems-on-chip (SoC) or systems-in-package (SiP), is becoming a brisk jog. With a mix of military and government funding, and market forces driving competitive innovation toward higher performance packaged solutions, 3D ICs are currently the step for early adopters and the next step for their competitors.

3D IC是PCB技术的逻辑小型化步骤，与可以在芯片上获得的功能相比，高密度系统的性能相对较便宜，但在很大程度上有限，尤其是在各种较新的半导体技术（例如IIII-V类半导体）的情况下。其他问题是，PCB系统呈现出噪声/干扰，灵敏度和可靠性责任，而单个软件包或堆栈中组装IC可能会减轻其中一些考虑因素。

由于PCB上的混合信号电路的整合自然会遭受较长的互连和路由的损失，因此可以通过将ICS堆叠或交错的ICS避免这种情况。水平放置SIP是PCBS集成的一步，但本身确实需要比2.5D或3D IC技术更大的足迹，并且与PCB技术面临的一些类似的路由挑战。

因此，与2D IC或PCB技术相比，完整的3D堆叠似乎提供了最佳效率，最佳的空间使用以及可能提高的性能。完整的3D半导体堆叠方法提出了各种考虑，其中最重要的是层之间的信号路由，这对于2.5 d d IC也是如此。对于3D IC来说，一种这样的解决方案是通过硅VIA（TSV），这是大约半个世纪的研发主题。

TSV technology merits

Earlier technologies such as edge-wired packages and the use of silicon interposers (2.5D) do enhance space usage; however, TSVs allow for the smallest layout space, high signal integrity interconnect, and the most efficient interconnect between layers. Though 3D TSV devices are less flexible than other solutions when it comes to dice size, pitch, and material; they also require greater minimum vertical space per layer. Due to the increased complexity and cost of full 3D packaging technology, the commercial market has mostly been exposed to this technology through high-performance computer RAM, image sensors, and FPGAs.

However, this is actively changing as integration of analog and mixed-signal sensing technologies alongside RF, power, and digital technology is increasing, vertically speaking. This presents an interesting path for analog electronics, where traditionally analog electronics have been integrated with digital electronics in mixed-signal ICs, which are often built on process nodes that greatly favor the digital technology. With full 3D integration, it is possible to have sensor and analog electronics on substrates that favor analog performance metrics over digital or high-frequency performance metrics (see figure below).

Conceptual illustration of heterogeneous and monolithic 3D integrated system includes digital logic (blue layer, silicon technology), analog/RF (red layer, III-V technology), and sensor (green layer, III-V technology). Source: MDPI

Ironically, though under development for decades, some of the drawbacks of 3D TSV technology are akin to being new technology. Many EDA tools don’t support 3D IC development. Moreover, the processes that have 3D TSVs are also new and the equipment, process times, and yields are all less than ideal. Other constraints include power, thermal, and signal quality of circuits that pass through many layers.

This article was originally published onPlanet Analog。

Jean-Jaques (JJ) DeLisle, an electrical engineering graduate (MS) from Rochester Institute of Technology, has a diverse background in analogand RF R&D, as well as technical writing/editing for design engineering publications. He writes about analog and RF for Planet Analog.