RF异质IC正在取得进展

Article By : Jean-Jaques (JJ) DeLisle

在上一个RF博客中，我们讨论了异质集成电路（HIC）技术，以及与RF半导体设备的开发有关的技术。以前的博客主要包括背景信息和驱动RF HIC的一些趋势。该博客将在未来几年内更多地关注该行业现状和RF HIC技术的前景。关于该主题的几位行业专家接受了采访，并且最近有针对RF技术的HIC发行的产品，证明RF HIC现在已经成为现实。

To recap, HICs are a synthesis of several ICs (chiplets) either within the same package on the same plane (2D), stacked within a package via an interposer (2.5), or stacked directly on top of each other (3D). There are other technologies being developed, such as direct transistor stacking, but that is outside the scope of this discussion. There are also technologies being developed that would enable class III-V semiconductor and CMOS combinations, which are also outside this discussion’s scope. The focus here is mainly on 2.5D and system-in-package (SiP) 2D technologies, as that ‘s what is currently available and in the works.

这项开发的主要驱动因素是试图扩展高级/主动天线系统（AAS）用于5G，卫星和军事/航空通信等电信应用以及雷达和电子战（EW）应用的能力。更深层次的集成水平的原因是，更紧密整合的芯片和IC Technologies的相对大小，重量和功率（交换）具有基本上优势的潜力。

然后，有与传统2D技术相关的性能瓶颈，例如PCB和低温共同燃料陶瓷（LTCC/HTCC）。此外，与IC技术相比，连接包装的互连损失和空间效率更高。为了增加吞吐量，添加其他天线元件和处理器或在边缘部署更高级的技术，当前的2D和连接的选项显然面临着限制。

The first RF HIC?

A recently launched case is the AMD-Xilinx Versal AI Edge adaptive compute acceleration platform (ACAP). It’s composed of chiplets for multiple methods of processing/computing, RF data converters, power converters, memory, and communication buses. As such, this is essentially a complete programmable network-on-a-chip. The various chiplets that comprise this RF SiP are produced by different vendors and likely required substantial development efforts to integrate all of the available technologies over a several year collaborative development process.

A Versal AI Edge device has enabled a cacheless-memory hierarchy to ease memory access bottlenecks. Source:AMD-Xilinx

In this case, the ACAP is likely 2D, possibly 2.5D in some cases, but still presents a much smaller footprint than a PCB version of a device with the same features. The description of the capability of this platform sounds quite impressive as a do-all solution.

但是，与PCB或连接技术相比，该平台虽然高度可编程，但从硬件角度来看是不灵活的。DSP/FPGA和RF转换器（类似模数转换器（ADC）和数字到Analog-Converters（DAC））已固定在硬件中，无法修改或升级。实际上，在专门制造工厂之外的此类单位进行返工或修理几乎是不可能的。此外，该平台的开发工具非常专业，因此，如果需要，则无法将开发系统移植到另一个平台。

Upsides and downsides

这个示例打入了更深层次的整合水平的关键。尽管可以通过足够的投资来开发RF HIC技术，但可以提高交换，效率和其他指标，但它以灵活性为本。这是Marki Microwave首席执行官Christopher Marki的评论：

“The main drawback is SiPs assume some amount of specificity in application/use. A generic single function block like a broadband amp can be used in many places. Putting that amp into a mixer SiP reduces the application space of that amp to being used as a converter. So, integration always sacrifices the number of customers who can use a certain solution. But, that new solution may be significantly more appealing to certain customers, and unlock more potential upsides. SiP does not solve all problems, there is a trade that balances technical and business considerations.”

Marki Microwave最近宣布了一系列带有集成驱动程序的混合器线：宽带LO驱动器放大器。如前所述，尽管不如AMD-XILINX ACAP复杂，甚至集成了在RF电路中配对的两个组件限制了SIP中组件的灵活性。因此，需要有足够需求的应用程序来推动此类技术的发展。

In discussion with other RFIC/MMIC vendors, it seems clear that there is a general move toward developing RF SiPs in the near term, with potential for more advanced RF HIC integration in the future. There is still a divide between the digital/processing/conversion RF HIC electronics and RF front-end (RFFE) technology.

很快可能会有一些开发项目包括更多的chiplet形式的RFFE，很可能包括III-V类半导体。欧洲航天局（ESA）已发布了此类开发的基金，专门针对KA波段AAS应用程序。还有许多类似的DARPA项目，与RF HIC中的RFFE技术有关。

本文最初发表在行星类似物。

让·贾克（JEN-JAQUES）（JJ）DELISLE, an electrical engineering graduate (MS) from Rochester Institute of Technology, has a diverse background in analog和RF研发以及设计工程出版物的技术写作/编辑。他写了关于行星模拟的模拟和RF。