High-frequency resonant converter design considerations, Part 1

Article By : Sheng-Yang Yu

High-frequency resonant converter design considerations include component selections, design with parasitic parameters, synchronous rectifier design, and voltage gain design. This power tip focuses on key parameters that affect switching component selection, as well as the effect of transformer intrawinding capacitance in a high-frequency resonant converter.

The commercialization of wide bandgap (WBG) devices over the past decade has enabled the operation of power converters at much higher frequencies for higher power density. High-performance power supplies are just starting to include WBG devices – especially silicon carbide and gallium nitride field-effect transistors (FETs) – because of their output capacitance (C_oss), gate charge (Q_g), on-resistance (R_DS(on)), and reverse-recovery charges (Q_rr), all lower (or nonexistent) than silicon or silicon super-junction FETs at the same breakdown voltage level. A lower Q_greduces the driving power needed – P_drive= V_driveQ_gF_sw– and a lower R_DS(on)reduces the conduction loss, where V_driveis the driving voltage and F_swis the FET switching frequency. Other than Q_gand R_DS(on), it’s also important to consider C_ossand Q_rrwhen selecting components in high-frequency converters.

In a resonant converter like the inductor-inductor-capacitor-series resonant converter (LLC-SRC) shown inFigure 1, the current in the resonant tank charges/discharges the C_ossof the FETs (state 1 in Figure 2) in order to achieve zero voltage switching (ZVS). ZVS means that the FET drain-to-source voltage (V_DS) reaches zero before its gate voltage goes high. Therefore, a lower C_ossenables a shorter dead time under the same resonant tank current level to achieve ZVS. A shorter dead time means a larger duty cycle and a lower root-mean-square (RMS) current on the primary-side resonant tank and FETs, which means higher efficiency and the ability to operate the converter at a higher switching frequency.

Figure 1LLC-SRC

To achieve ZVS, there is always a period during which the body diode of the FET conducts current – state 2 inFigure 2. If the FET has Q_rrand is turned on again when the body diode still conducts current, the FET itself will create a reverse current to discharge Q_rr和cause hard switching and high voltage stress – potentially damaging the FET.

Figure 2Switching transitions of an LLC-SRC

Figure 3illustrates this hard switching phenomenon during the startup process of an LLC-SRC as illustrated in Figure 1. When FET Q₂first conducts current, inductor current I_PRIis built up. The current I_PRIthen conducts through FET Q₁channel and body diode. Without allowing the current to go in the reverse direction, FET Q₂turns on again. Because of the Q_rr, FET Q₁self-generates a reverse current to discharge Q_rr, which results in high voltage stress.

Figure 3Hard switching due to Q_rr

In a high-frequency resonant converter, the resonant tank impedance is generally much lower than that in a low-frequency resonant converter. Therefore, the startup inrush current in a high-frequency resonant converter is expected to be higher. Using the LLC-SRC in Figure 1 as an example, when the output voltage is zero (the initial condition at startup), the only impedance limiting the startup current when Q₂first conducts is L_r– the series resonant inductor in the LLC-SRC. High-efficiency and high-frequency resonant converter designs, especially bus converters, generally minimize L_rin order to improve efficiency. A smaller L_rvalue makes the startup current higher under the same startup frequency and thus more vulnerable to Q_rr-related hard switching. Therefore, it is essential to use low Q_rrFETs in high-frequency resonant converters.

利用上述世行集团井斜的好处ces, it is possible to operate isolated resonant converters in the megahertz range, which is 5 to 10 times faster than traditional isolated power supplies. In this “higher frequency” domain, many parameters once considered “negligible” during the converter design process are no longer negligible, such as the transformer intrawinding capacitor.

In the traditional resonant converter design process, the designer must ensure that the energy stored in the resonant tank is higher than the energy stored in the FET C_ossso that C_ossdepletes the energy stored in the resonant tank to achieve ZVS. Taking the LLC-SRC shown in Figure 1 as an example, Equation 1 ensures the validity of this inequality:

where I_Lmis the peak current of the magnetizing inductor L_mand V_inis the input voltage of the LLC-SRC. Equation 1 can be rewritten as Equation 2 by applying Ohm’s law for the inductor to L_m:

where n = N_p:N_s1(assuming N_s1= N_s2) is the transformer turns ratio and V_outis the output voltage.

When resonant converter designs need to cover a wide operation range and holdup time, L_mis generally much smaller than the value on the right side of Equation 2 in order to keep L_n= L_m/L_rlow (applying L_n值从4到10闭环LLC-SRC设计n). When resonant converter designs such as bus converters require high converter efficiency, maximizing L_mlowers the primary RMS current for a lower conduction loss. In this case, the L_mvalue will be closed to the value on the right side of Equation 2. Equation 2 only represents the ideal condition with an ideal transformer, however. In a real transformer, many parameters could affect the C_osscharge and discharge capability. The most critical parameter is the intrawinding capacitance.

Figure 4shows a simplified circuit model during a switching transient in an LLC-SRC, where current on L_m(I_Lm) discharges C_eq(the C_ossof two FETs in series with resonant capacitor C_r), assuming C_ras a voltage source. Without the transformer intrawinding capacitance (C_TX), all of I_Lmgoes to C_eqand Equation 2 is valid. But with the presence of C_TX, some of I_Lmhas to go to C_TXto change the transformer winding polarity, which reduces the C_ossdischarge capability and creates the possibility of losing ZVS. Therefore, it is essential to keep C_TXlower by keeping layers of primary winding apart from each layer with distance as well as layers distance of secondary windings.

Figure 4The effect of a transformer intrawinding capacitor

A rule of thumb in determining the L_mvalue is to use just half of the maximum L_mvalue calculated using Equation 2, as it is generally difficult to predict the C_TXvalue before actually building a transformer. C_TXgenerally falls inside the range of 22 pF to 100 pF in a converter with a 400-V input. It is also very useful to model C_TXin a circuit simulation once the transformer structure is fixed, in order to ensure a low-enough L_mwith margin.

In the next installment of this series, I will focus on synchronous rectifier design challenges in high-frequency resonant converter designs.

Sheng-Yang Yuis an applications engineer at Texas Instruments.

Related articles:

• Power Tips #84: Think outside the LLC series resonant converter box
• MOSFET Qrr: Ignore at your peril in the pursuit of power efficiency
• Design considerations when selecting half bridge resonant LLC converters and primary side MOSFETs
• Using quasi-resonant and resonant converters