Careful imprinting scheme

文章:保罗·拉科(Paul Rako)

示意性符号偏好就像音乐偏好。他们非常个人化。它是您作为工程师风格的一部分。

«以前:示意性符号创建中的做和不做

关于绘制示意图的讨论有一些很好的讨论。有时,您的CAD套件中的预包装符号会起作用,大多数时候它们不会。

几十年前发明的那些在Cadence Orcad发明的异质部件也可以用来将连接器分解为不同的块。这也将保留原理图的流量,同时仍确保每根电线都传到正确的连接器(图1)。现在,您可以确保示意图从左到右流动,这将使其他工程师更容易理解它们。五年后,当您查看它们时,您也更容易理解它们。


[EDN schematic fig6 (cr)]
图1:If you let a connector symbol stay one part it makes the schematic very confusing (a). By using the heterogeneous part function in OrCAD, or the part “modes” in Altium/CircuitStudio, you can break the connector up so that the schematic flows better and is much easier to understand at a glance (b).

另一个考虑因素是复杂零件的清晰度,例如开关电源芯片。即使您将输入移至左侧并向右输出,对于零件的工作方式仍然很神秘。为此,您可以在符号轮廓内绘制一个简单的图表,以提示有关零件的作用。它不必是数据表中的框图,而是一个简单的表示形式来提醒您和其他人的零件。

There are other schematic symbol conventions that are more preferences, rather than good design practice. I have always liked transistors enclosed in a circle. Once again, it was those semiconductor folks that had to draw hundreds of transistors that dropped the circle. I think the circle has dignity. Similarly, I have always loved to have little jumps when a wire crosses another. This brings up another point: no four-way ties. I have worked on a FAXed schematic and sure enough, it was impossible to see if the wires were just crossing, rather than tied together. I guessed wrong and it cost me a day. If all schematics had jumps, the “no four-way ties” rule would not be as important. To my delight, the recent versions of Altium/CircuitStudio can show jumps as well as suppress four-way ties (Figure 2).


[EDN schematic fig7 (cr)]
图2:像我这样的旧观察器喜欢显示电线跳过没有连接的其他电线。请注意,四向领带是一种示意性的禁忌。Altium/CircuitStudio具有创建电线跳跃的偏好,也可以通过踢电线偏移来消除交叉局部,就像该芯片的GND连接一样。注意库部分在左侧有输出,右侧的输入与您想要的完全相反。

我的偏爱是使用左图上的输入重新绘制零件符号(图3)。我还使用了单独的功率和地面符号,从而降低了缠结效果。毕竟,这是我们关心的信号流。


[EDN示意图图8(CR)]
Figure 3:Modify the 555 timer of Figure 2 to put inputs on the left and outputs on the right. The schematic flows better. Separate power and ground symbols eliminate the wire tangles.

Most engineers understand what is inside a 555 timer IC. But if you don’t, or you think the people reading the schematic won’t, then you can draw some or all of the block diagram inside the part. Altium/CircuitStudio will let you put an image into a schematic symbol, so I found a nice 555 timer block diagram online and after a little trimming and stretching, I plopped it into the schematic symbol. I had to adhere to their pin-out, so now the schematic has some jumps in it (Figure 4).


[EDN schematic fig9 (cr)]
Figure 4:You can draw a block diagram inside the part to show its function. This might be as simple as showing an open-collector output, or more involved, like showing functions inside a switching power chip. Some CAD packages let you paste an image inside the part.

这提出了一个很好的观点。您可以以牺牲整体示意图为代价来纪念零件内部的结构,或者不必担心零件内部的内容,而是保持干净的简单示意图。我的想法是尝试在零件内部绘制相关的东西,例如开放式输出。但是,重要的是要保持整体示意图毫无障碍和可以理解。

好的,最后一个愚蠢的模拟家伙偏好。回到大学后,约翰·库拉斯(John Kuras)曾经开玩笑说,应该用更厚的线条将电源晶体管拉大。那时我们都笑了,但是现在我想证明晶体管是使用较大符号的巨型to-3怪物(图5)。模拟接受一种重要的感觉,更大的晶体管更为重要,以这种方式绘制它是很好的。


[EDN schematic fig10 (cr)]
Figure 5:每个人都可以看到右侧的晶体管是一个电源晶体管。

示意性符号偏好就像音乐偏好。他们非常个人化。它是您作为工程师风格的一部分。有些事情之类的东西像电线跳跃和围绕晶体管的圆圈不那么重要。诸如右侧和顶部的输入之类的东西,右侧和底部的输出更为重要。我们都可以争论如何处理既是输入又是输出的总线。我认为地面符号很重要。网络上有一个应用程序注释,如果您按照符号的建议将其连接到地面,它将炸毁二极管。

本文首次在EDN上发表。


«以前:示意性符号创建中的做和不做

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